For semiconductor integrated circuit testing, a high temperature burn-in test has been conducted. In the high temperature burn-in test, a semiconductor integrated circuit is set in a high-temperature environment to enter a high-temperature state at the completed product stage, that is, after a semiconductor chip cut out from a wafer is mounted on the base of a package, the semiconductor chip and external connection terminals of the package are electrically connected, and the package is molded, and an input signal in an operating state is supplied to an input terminal of the semiconductor integrated circuit, and whether or not an output signal of that semiconductor integrated circuit is in a predetermined output state is tested.
More specifically, as shown in FIG. 7, in a semiconductor integrated circuit, an input of a preceding circuit 1 consisting of MOS transistors is connected to an external connection terminal 2, an output of a succeeding circuit 3 consisting of MOS transistors is connected to an external connection terminal 4, and between an output of the preceding circuit 1 and an input of the succeeding circuit 3, an internal circuit 5 consisting of MOS transistors is interposed. A semiconductor integrated circuit containing in the package thereof a semiconductor chip 6 having the aforementioned semiconductor integrated circuit, upon occurrence of a defective crystal, a crack or an oxide film abnormality, etc., may normally operate at room temperature, but if the temperature becomes high, the semiconductor integrated circuit may become defective in that the delay time fluctuates due to leakage current of the integrated MOS circuit, or may also become defective in that a logic level error occurs on the way to transmit a signal from the input side to the output side.
Even though it has turned out that such defects are caused by the leakage current of the MOS circuit, the leakage current of the circuits that cannot be directly monitored, such as an input terminal or output terminal of the internal circuit 5, cannot be measured, so a high-temperature burn-in test has been conducted by inputting a direct current voltage or pulses in a high-temperature environmental condition to determine whether or not the logic circuit exhibits an output of a regular logic output level (H level/L level), thereby determining whether the circuit is non-defective or defective. When a logic circuit containing a counter is a test target, a so-called functional test has been conducted, the functional test determining whether the logic circuit is non-defective or defective based on whether or not the logic circuit exhibits a logic output according to the number of pulses input.
Patent Document 1: Japanese Patent Laid-Open No. 3-52247
Patent Document 2: Japanese Patent Laid-Open No. 6-29301
In order to conduct such high-temperature burn-in test, it is necessary to wait until the packaged semiconductor integrated circuit becomes stable at a high temperature, so the test can not be conducted in a short period of time, which is not suitable for mass production. Also, the quality of diffusion for the semiconductor chips cannot be tested until the final stage in which the semiconductor chips become completed packaged semiconductor integrated circuits, and as a result, the overall yield has been lowered.
An object of the present invention is to provide a testing method of semiconductor integrated circuit capable of testing the quality of diffusion for semiconductor chips before the semiconductor chips become packaged semiconductor integrated circuits.